View VN5E010AH-E_7513228.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

september 2013 doc id 15984 rev 3 1/37 1 vn5e010ah 10 m ? high-side driver with analog current sense for automotive applications features ? general ? inrush current active management by power limitation ? very low standby current ? 3 v cmos compatible inputs ? optimized electromagnetic emissions ? very low electromagnetic susceptibility ? in compliance with the 2002/95/ec european directive ? very low current sense leakage ? diagnostic functions ? proportional load current sense ? high current sense precision for wide current range ? current sense disable ? off-state open-load detection ? output short to v cc detection ? overload and short to ground (power limitation) indication ? thermal shutdown indication ? protection ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? overtemperature shut down with autorestart (thermal shutdown) ? reverse battery protection with self switch on of the power mosfet (see figure 32 ) ? electrostatic discharge protection applications ? all types of resistive, inductive and capacitive loads ? suitable as led driver description the vn5e010ah is a single-channel high-side driver manufactured in the st proprietary vipower m0-5 technology and housed in the tiny hpak package. the vn5e010ah is designed to drive 12 v automotive grounded loads delivering protection, diagnostics and easy 3 v and 5 v cmos compatible in terface with any microcontroller. the device integrates advanced protective functions such as load cu rrent limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto- restart and overvoltage active clamp. a dedicated analog current sense pin is associated with every output channel in order to provide ehnanced diagnostic functions includ ing fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, short-circuit to vcc diagnosis and on- and off-state open-load detection. the current sensing and diagnostic feedback of the whole device can be disabled by pulling the cs_dis pin high to allow sharing of the external sense resistor with other similar devices . max supply voltage v cc 41 v operating voltage range v cc 4.5 v to 28 v typ. on-state resistance r on 10 m ? current limitation (typ) i limh 85 a off-state supply current i s 2 a (1) 1. typical value with all loads connected www.st.com
contents vn5e010ah 2/37 doc id 15984 rev 3 contents 1 block diagram and pin co nfiguration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.1 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.2 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.3 current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.3.1 short to vcc and off-state open-load detection . . . . . . . . . . . . . . . . . 26 3.4 maximum demagnetization energy (vcc = 13.5 v) . . . . . . . . . . . . . . . . . 27 4 package and pc board thermal da ta . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.1 hpak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.2 hpak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.3 hpak suggested land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.4 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
vn5e010ah list of tables doc id 15984 rev 3 3/37 list of tables table 1. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unuse d and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 13 v, tj = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. current sense (8 v < v cc < 18 v). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 10. open load detection (8 v < vcc < 18 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 13. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 14. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 15. thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 16. hpak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 17. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
list of figures vn5e010ah 4/37 doc id 15984 rev 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) not in scale. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. current sense delay characteristic s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 5. open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. i out /i sense vs. i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. maximum current sense ratio drift vs. load current (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 14. off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 9 figure 15. short to v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 16. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 17. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 18. high-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 19. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 20. low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 21. high-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 22. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 23. on-state resistance vs. tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 24. on-state resistance vs. vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 25. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 27. ilimh vs. tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 28. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 29. high-level cs_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 30. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 31. low-level cs_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 32. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 33. current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 34. maximum turn-off current versus inductance (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 35. pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 36. rthj-amb vs. pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 28 figure 37. hpak thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 38. thermal fitting model of a single-channel hsd in hpak (1) . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 39. hpak package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 40. hpak suggested pad layout (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 41. hpak tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 42. hpak tape and reel (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
vn5e010ah block diagram and pin configuration doc id 15984 rev 3 5/37 1 block diagram and pin configuration figure 1. block diagram table 1. pin functions name function v cc battery connection out power output (1) 1. pins 1 and 7 must be externally tied together. gnd ground connection in voltage controlled input pin with hysteresis , cmos compatible. controls output switch state cs analog cs pin, delivers a current proportional to the load current cs_dis active high cmos compatible pin, to disable the cs pin v cc control & diagnostic logic driver v on limitation current limitation power clamp off state open load over temp. undervoltage v senseh current sense overload protection (active power limitation) in cs cs_ dis gnd out signal clamp reverse battery protection
block diagram and pin configuration vn5e010ah 6/37 doc id 15984 rev 3 figure 2. configuration diag ram (top view) not in scale table 2. suggested connections for unused and not connected pins connection / pin cs out in cs_dis floating not allowed x x x to ground through 1 k ? resistor through 22 k ? resistor through 10 k ? resistor through 10 k ? resistor in vcc cs cs_dis 1234 56 7 gnd out out
vn5e010ah electrical specifications doc id 15984 rev 3 7/37 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the rating listed in the table 3: absolute maximum ratings may cause permanent damage to the device . these ar e stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect de vice reliability. refer also to the stmicroelectronics sure program and other relevant quality document. i s i gnd v cc v cc out in v in v sense gnd cs_dis i csd v csd i in cs v out i out i sense table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 16 v i out dc output current internally limited a -i out reverse dc output current 20 a i in dc input current -1 to 10 ma i csd dc current sense disable input current -1 to 10 ma v csense current sense maximum voltage (v cc > 0) v cc - 41 +v cc v v e max maximum switching energy (single pulse) (l = 2.2 mh; r l = 0 ?? ; v bat = 13.5 v; t jstart = 150 c; i out = i liml (typ.) ) 645 mj
electrical specifications vn5e010ah 8/37 doc id 15984 rev 3 2.2 thermal data v esd electrostatic discharge (human body model: r = 1.5 k ?? c = 100 pf) ?in ?cs ?cs_dis ?out ?v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter max. value unit r thj-case thermal resistance junction-case 0.55 c/w r thj-amb thermal resistance junction-ambient 67.7 c/w
vn5e010ah electrical specifications doc id 15984 rev 3 9/37 2.3 electrical characteristics values specified in this section are for 8 v < v cc < 28 v, -40 c < t j < 150 c, unless otherwise specified. table 5. power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 4.5 13 28 v v usd undervoltage shutdown 3.5 4.5 v v usdhyst undervoltage shutdown hysteresis 0.5 v r on on-state resistance i out = 6 a; t j = 25 c 10 m ? i out = 6 a; t j = 150 c 20 i out = 6 a; v cc = 5 v; t j = 25 c 13 r on-rev r dson in reverse battery condition v cc = -13 v; i out = -6 a; t j = 25 c 10 m ? v clamp clamp voltage i cc = 20 ma; i out = 0 a 41 46 52 v i s supply current off-state: v cc = 13 v; t j = 25 c; v in = v out = v sense = 0 v 2 5 a on-state: v cc = 13 v; v in = 5 v; i out = 0 a 1.5 3 ma i l(off) off-state output current v in = v out = 0 v; v cc = 13 v; t j = 25 c 00.01 3 a v in = v out = 0 v; v cc = 13 v; t j = 125 c 05 table 6. switching (v cc = 13 v, t j = 25 c) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 2.2 ? (see figure 6 ) -40 -s t d(off) turn-off delay time r l = 2.2 ? (see figure 6 ) -28 -s (dv out /dt) on turn-on voltage slope r l = 2.2 ? - (see figure 26 )- v ? s (dv out /dt) off turn-off voltage slope r l = 2.2 ? - (see figure 28 )- v ? s w on switching energy losses at turn-on (t won ) r l = 2.2 ? (see figure 6 ) -2 -mj w off switching energy losses at turn-off (t woff ) r l = 2.2 ? (see figure 6 ) -0.6 -mj
electrical specifications vn5e010ah 10/37 doc id 15984 rev 3 table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il low-level input voltage 0.9 v i il low-level input current v in = 0.9 v 1 a v ih high-level input voltage 2.1 v i ih high-level input current v in = 2.1 v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1 ma 5.5 7 v i in = -1 ma -0.7 v csdl low-level cs_dis voltage 0.9 v i csdl low-level cs_dis current v csd = 0.9 v 1 a v csdh high-level cs_dis voltage 2.1 v i csdh high-level cs_dis current v csd = 2.1 v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd = 1 ma 5.5 7 v i csd = -1 ma -0.7 table 8. protection and diagnostics (1) 1. to ensure long term reliability under heavy overload or short-circuit conditi ons, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles symbol parameter test conditions min. typ. max. unit i limh short-circuit current v cc = 13 v 60 85 120 a 5 v < v cc < 28 v 120 i liml short-circuit current during thermal cycling v cc =13 v; t r < t j < t tsd 21 a t tsd shutdown temperature 150 175 200 c t r reset temperature t rs + 1 t rs + 5 c t rs thermal reset of status 135 c t hyst thermal hysteresis (t tsd - t r ) 7c v demag turn-off output voltage clamp i out = 2 a; v in = 0; l = 6 mh v cc - 41 v cc - 46 v cc - 52 v v on output voltage drop limitation i out = 0.5 a; t j = -40 c to 150 c 25 mv
vn5e010ah electrical specifications doc id 15984 rev 3 11/37 table 9. current sense (8 v < v cc < 18 v) symbol parameter test conditions min. typ. max. unit k 0 i out /i sense i out = 0.25 a; v sense = 0.5 v t j = -40 c to 150 c t j = 25 c to 150 c 3000 3000 7410 7410 12000 11600 k 1 i out /i sense i out = 6 a; v sense = 0.5 v t j = -40 c to 150 c t j = 25 c to 150 c 5350 5510 6740 6740 8500 7745 dk 1 /k 1 (1) current sense ratio drift i out = 6 a; v sense = 0.5 v; v csd =0v; t j = -40 c to 150 c -15 15 % k 2 i out /i sense i out = 10 a; v sense = 4 v t j = -40 c to 150 c t j = 25 c to 150 c 5850 5800 6570 6570 7690 7195 dk 2 /k 2 (1) current sense ratio drift i out = 10 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c -11 11 % k 3 i out /i sense i out = 25 a; v sense = 4 v t j = -40 c to 150 c t j = 25 c to 150 c 5915 5850 6420 6420 7000 6755 dk 3 /k 3 (1) current sense ratio drift i out = 25 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c -8 8 % i sense0 analog sense leakage current i out = 0 a; v sense = 0 v; v csd = 5 v; v in =0 v; t j = -40 c to 150 c 01 a i out = 0 a; v sense = 0 v; v csd = 0 v; v in = 5 v; t j = -40 c to 150 c 02 i out = 2 a; v sense = 0 v; v csd = 5 v; v in = 5 v; t j = -40 c to 150 c 1 i ol open load on-state current detection threshold v in = 5 v, 8 v < v cc < 18 v i sense = 5 a 580ma v sense max analog sense output voltage i out = 18 a; r sense = 3.9 k ? 5v v senseh (2) analog sense output voltage in fault condition v cc = 13 v; r sense = 3.9 k ? 8v i senseh (2) analog sense output current in fault condition v cc = 13 v; v sense = 5 v 9 ma
electrical specifications vn5e010ah 12/37 doc id 15984 rev 3 t dsense1h delay response time from falling edge of cs_dis pin v sense < 4 v, 1.5 a < i out < 25 a i sense = 90% of i sense max (see figure 4 ) 50 100 s t dsense1l delay response time from rising edge of cs_dis pin v sense < 4 v, 1.5 a < i out < 25 a i sense =10% of i sense max (see figure 4 ) 520s t dsense2h delay response time from rising edge of in pin v sense < 4 v, 1.5 a < i out < 25 a i sense =90% of i sense max (see figure 4 ) 270 600 s ? t dsense2h delay response time between rising edge of output current and rising edge of current sense v sense <4v, i sense = 90% of i sensemax, i out = 90% of i outmax i outmax = 3a (see figure 7 ) 310 s t dsense2l delay response time from falling edge of in pin v sense < 4 v, 1.5 a < i out < 25 a i sense =10% of i sense max (see figure 4 ) 100 250 s 1. parameter guaranteed by design, it is not tested. 2. fault condition includes: power limitation, over-temperature and open load off-state detection. table 10. open load detection (8 v < v cc < 18 v) symbol parameter test conditions min. typ. max. unit v ol open-load off-state voltage detection threshold v in = 0 v 2 see figure 5 4v t dstkon output short-circuit to v cc detection delay at turn-off see figure 5 180 1200 s i l(off2)r off-state output current at v out = 4 v v in = 0 v; v sense = 0 v v out rising from 0 v to 4 v -120 90 a i l(off2)f off-state output current at v out = 2 v v in = 0 v; v sense = v senseh ; v out falling from v cc to 2 v -50 90 a t d_vol delay response from output rising edge to v sense rising edge in open-load v out = 4 v; v in = 0 v v sense = 90% of v senseh 20 s table 9. current sense (8 v < v cc < 18 v) (continued) symbol parameter test conditions min. typ. max. unit
vn5e010ah electrical specifications doc id 15984 rev 3 13/37 figure 4. current sense delay characteristics figure 5. open-load off-state delay timing figure 6. switching characteristics current sense input load current cs_dis t dsense2h t dsense2l t dsense1l t dsense1h v in v cs t dstkon output stuck to v cc v out > v ol v senseh v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff
electrical specifications vn5e010ah 14/37 doc id 15984 rev 3 figure 7. delay response time between ri sing edge of ouput current and rising edge of current sense (cs enabled) figure 8. output voltage drop limitation v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax ? t dsense2h t t t v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t)
vn5e010ah electrical specifications doc id 15984 rev 3 15/37 figure 9. i out /i sense vs. i out figure 10. maximum current sense ratio drift vs. load current (1) 1. parameter guaranteed by design; it is not tested. i out /i sense 2000 3200 4400 5600 6800 8000 9200 10400 11600 12800 -2 1 4 7 10131619222528 i out (a) a b c d e a : max, t j = -40 c to 150 c b : max, t j = 25 c to 150 c c : typical, t j = -40 c to 150 c d : min, t j = 25 c to 150 c e : min, t j = -40 c to 150 c a : max, t j = -40 c to 150 c b : min, t j = -40 c to 150 c dk/k (%) -20 -15 -10 -5 0 5 10 15 20 4 7 10 13 16 19 22 25 28 i out (a) a b
electrical specifications vn5e010ah 16/37 doc id 15984 rev 3 table 11. truth table conditions input output sense (v csd = 0 v) (1) 1. if the v csd is high, the sense output is at a high-im pedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overload h h x (no power limitation) cycling (power limitation) nominal v senseh short-circuit to gnd (power limitation) l h l l 0 v senseh open load off-state (with external pull-up) lhv senseh short-circuit to v cc (external pull-up disconnected) l h h h v senseh < nominal negative output voltage clamp ll 0
vn5e010ah electrical specifications doc id 15984 rev 3 17/37 table 12. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5 v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75 v -100 v 5000 pulses 0.5 s 5 s 2 ms, 10 ? 2a +37 v +50 v 5000 pulses 0.2 s 5 s 50 s, 2 ? 3a -100 v -150 v 1h 90 ms 100 ms 0.1 s, 50 ? 3b +75 v +100 v 1h 90 ms 100 ms 0.1 s, 50 ? 4 -6 v -7 v 1 pulse 100 ms, 0.01 ? 5b (2) 2. valid in case of external load dump clamp: 40 v maximum referred to ground. +65 v +87 v 1 pulse 400 ms, 2 ? table 13. electrical transient requirements (part 2) iso 7637-2: 2004(e) test pulse test level results iii iv 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. valid in case of external load dump clamp: 40v maximum referred to ground. cc table 14. electrical transient requirements (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are no t performed as designed after exposure to disturbance and cannot be returned to prop er operation without replacing the device.
electrical specifications vn5e010ah 18/37 doc id 15984 rev 3 2.4 waveforms figure 11. normal operation figure 12. overload or short to gnd i out v sense v cs_dis input nominal load nominal load i out v sense v cs_dis input nominal load nominal load power limitation i limh > i liml > i out v sense v cs_dis input thermal cycling power limitation i limh > i liml > i out v sense v cs_dis input thermal cycling
vn5e010ah electrical specifications doc id 15984 rev 3 19/37 figure 13. intermittent overload figure 14. off-state open-load with external circuitry i out v sense v cs_dis input i limh > nominal load i liml > overload v senseh > i out v sense v cs_dis input i limh > nominal load i liml > overload v senseh > input v ol i out v sense v cs_dis v out v out > v ol t dstk(on) v senseh > input v ol i out v sense v cs_dis v out v out > v ol t dstk(on) v senseh >
electrical specifications vn5e010ah 20/37 doc id 15984 rev 3 figure 15. short to v cc figure 16. t j evolution in overload or short to gnd t dstk(on) v out > v ol resistive short to v cc hard short to v cc i out v cs_dis v out v ol t dstk(on) t dstk(on) v out > v ol resistive short to v cc hard short to v cc i out v cs_dis v out v ol t dstk(on) t tsd t r i limh > < i liml t j_start t hyst power limitation self-limitation of fa st thermal transients input i out t j t tsd t r i limh > < i liml t j_start t hyst power limitation self-limitation of fa st thermal transients input i out t j
vn5e010ah electrical specifications doc id 15984 rev 3 21/37 2.5 electrical char acteristics curves figure 17. off-state output current figure 18. high-level input current iloff [na] 0 1000 2000 3000 4000 5000 6000 -50 -25 0 25 50 75 100 125 150 175 tc [c] iih [ua] 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 -50 -25 0 25 50 75 100 125 150 175 tc [c] vin= 2.1v figure 19. input clamp voltage figure 20. low-level input voltage vicl [v] 5 5.2 5.4 5.6 5.8 6 6.2 6.4 6.6 6.8 7 -50 -25 0 25 50 75 100 125 150 175 tc [c] iin= 1m a vil [v] 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -50 -25 0 25 50 75 100 125 150 175 tc [c] figure 21. high-level input voltage figure 22. input hysteresis voltage vih [v] 0 0.5 1 1.5 2 2.5 3 3.5 4 -50 -25 0 25 50 75 100 125 150 175 tc [c] vihyst [v] 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -50 -25 0 25 50 75 100 125 150 175 tc [c]
electrical specifications vn5e010ah 22/37 doc id 15984 rev 3 figure 23. on-state resistance vs. t case figure 24. on-state resistance vs. v cc ro n [ m oh m ] 0 10 20 30 40 50 60 70 80 -50 -25 0 25 50 75 100 125 150 175 tc [c] iout= 6a vcc= 13v ro n [ m oh m ] 0 5 10 15 20 25 30 0 5 10 15 20 25 30 35 40 vcc [v] tc= -40c tc= 25c tc= 125c tc= 150c figure 25. undervoltage shutdown figure 26. turn-on voltage slope vusd [v] 0 2 4 6 8 10 12 14 16 -50 -25 0 25 50 75 100 125 150 175 tc [c] (dvout/dt)on [v/m s] 0 100 200 300 400 500 600 700 800 900 1000 -50 -25 0 25 50 75 100 125 150 175 tc [c] vcc= 13v rl= 13 ? figure 27. i limh vs. t case figure 28. turn-off voltage slope ilim h [a] 40 50 60 70 80 90 100 -50 -25 0 25 50 75 100 125 150 175 tc [c] v cc= 13v (dvout/dt)off [v/ms] 0 100 200 300 400 500 600 700 800 900 1000 -50 -25 0 25 50 75 100 125 150 175 tc [c] vcc= 13v rl= 13 ?
vn5e010ah electrical specifications doc id 15984 rev 3 23/37 figure 29. high-level cs_dis voltage figure 30. cs_dis clamp voltage vcsdh [v] 0 0.5 1 1.5 2 2.5 3 3.5 4 -50 -25 0 25 50 75 100 125 150 175 tc [c] vcsdcl [v] 0 1 2 3 4 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 150 175 tc [c] iin= 1m a figure 31. low-level cs_dis voltage vcsdl [v] 0 0.5 1 1.5 2 2.5 3 3.5 4 -50 -25 0 25 50 75 100 125 150 175 tc [c]
application information vn5e010ah 24/37 doc id 15984 rev 3 3 application information figure 32. application schematic 3.1 load dump protection d ld is necessary (voltage transie nt suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2 2004 (e) table. 3.2 mcu i/os protection when negative transients are present on the v cc line, the control pins is pulled negative to approximatly -1.5 v. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hs d i/os (input levels compatibilit y) with the latch-up limit of microcontroller i/os. equation 1 -v ccpeak / i latchup ? r prot ? (v oh ? c - v ih ) / i ihmax calculation example: for v ccpeak = - 1.5 v; i latchup ? 20 ma; v oh ? c ? 4.5 v 75 ? ? r prot ? 240 k ? . recommended values: r prot =10 k ??? c ext =10 nf . v cc gnd out +5v cs_dis in r prot r prot 20v d ld r prot r sense cs mcu 45v c ext
vn5e010ah application information doc id 15984 rev 3 25/37 3.3 current sense and diagnostic the current sense pin performs a double function (see figure 33: current sense and diagnostic ): ? current mirror of the load cu rrent in normal operation, delivering a current proportional to the load one according to a know ratio k x . the current i sense can be easily converted to a voltage v sense by means of an external resistor r sense . linearity between i out and v sense is ensured up to 5 v minimum (see parameter v sense in table 9: current sense (8 v < v cc < 18 v) ). the current sense accuracy depends on the output current (refer to current sense electrical characteristics table 9: current sense (8 v < v cc < 18 v) ). ? diagnostic flag in fault conditions , delivering a fixed voltage v senseh up to a maximum current i senseh in case of the following fault conditions (refer to table 11: truth table ): ? power limitation activation ? overtemperature ? short to v cc in off-state ? open load in off-state with additional external components. a logic level high on cs_dis pin sets at the same time all the current sense pins of the device in a high-impedance state, thus di sabling the current monitoring and diagnostic detection. this feature allows multiplexing of the microcontr oller analog inputs by sharing of sense resistance and adc line among different devices. figure 33. current sense and diagnostic main mosn 41v outn i loff2r r sense r prot to uc adc r pd r pu v pu pwr_lim v sense pu_cmd overtemperature ol off + - v ol current sensen i out /k x i senseh v bat i loff2f v senseh load inputn v cc gnd cs_dis
application information vn5e010ah 26/37 doc id 15984 rev 3 3.3.1 short to v cc and off-state op en-load detection short to v cc a short-circuit between v cc and output is indicated by the relevant current sense pin set to v senseh during the device off-state. small or no current is delivered by the current sense during the on-state depending on the nature of the short-circuit. off-state open-load with external circuitry detection of an open load in off mode requires an external pull-up resistor r pu connecting the output to a positive supply voltage v pu . it is preferable v pu to be switched off during the module standby mode in order to avoid the overall standby current consumption to increase in normal conditions, i.e. when load is connected. an external pull-down resistor r pd connected between output and gnd is mandatory to avoid misdetection in case of floating outputs in off-state (see figure 33: current sense and diagnostic ). r pd must be selected in order to ensure v out < v olmin unless pulled-up by the external circuitry: equation 2 r pd ?? 22 k ?? is recommended. for proper open load detection in off-state, the external pull-up resistor must be selected according to the following formula: equation 3 for the values of v olmin ,v olmax , i l(off2)r and i l(off2)f (see table 10: open load detection (8 v < vcc < 18 v) ). v v i r v min ol f ) off ( l pd off _ up pull out 2 2 ? ? ? ? ? ? ? ? ? ?? v v r r i r r v r v max ol pd pu r ) off ( l pd pu pu pd on _ up pull out 4 2 ? ? ? ? ? ? ? ? ?
vn5e010ah application information doc id 15984 rev 3 27/37 3.4 maximum demagnetization energy (v cc =13.5 v) figure 34. maximum turn-off current versus inductance (1) 1. values are generated with r l =0 ?? in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. demagnetization demagnetization demagnetization t v in , i l c : t jstart = 125 c (repetitive pulse) a : t jstart = 150 c (single pulse) b : t jstart = 100 c (repetitive pulse) 1 10 100 0, 1 1 10 100 l (mh) i (a) a b c
package and pc board thermal data vn5e010ah 28/37 doc id 15984 rev 3 4 package and pc board thermal data 4.1 hpak thermal data figure 35. pc board (1) 1. layout condition of rth and zth measurements (pcb fr4 area = 58 mm x 58 mm, pcb thickness =1.8 mm, cu thickness = 70 m , copper areas: from minimum pad lay-out to 8 cm 2 ). figure 36. r thj-amb vs. pcb copper area in open box free air condition 30 35 40 45 50 55 60 65 70 0246810 rthj_amb(c/w) pcb cu heatsink area (cm^2)
vn5e010ah package and pc board thermal data doc id 15984 rev 3 29/37 figure 37. hpak thermal impeda nce junction ambient single pulse figure 38. thermal fitting model of a single-channel hsd in hpak (1) 1. the fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. 0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000 time (s) zth (c/w) cu=8 cm2 cu=2 cm2 cu=foot print
package and pc board thermal data vn5e010ah 30/37 doc id 15984 rev 3 equation 4: pulse calculation formula where ? = t p /t table 15. thermal parameter area/island (cm 2 )footprint48 r1 (c/w) 0.01 r2 (c/w) 0.15 r3 (c/w) 0.5 r4 (c/w) 8 r5 (c/w) 28 22 12 r6 (c/w) 31 25 16 c1 (w.s/c) 0.005 c2 (w.s/c) 0.05 c3 (w.s/c) 0.1 c4 (w.s/c) 0.4 c5 (w.s/c) 0.8 1.4 3 c6 (w.s/c) 3 6 9 z th ? r th ? z thtp 1 ? ? ?? + ? =
vn5e010ah package and packing information doc id 15984 rev 3 31/37 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 hpak mechanical data figure 39. hpak package dimension
package and packing information vn5e010ah 32/37 doc id 15984 rev 3 table 16. hpak mechanical data ref. dim data book mm nom. min. max. a 2.20 2.40 a1 0.90 1.10 a2 0.03 0.23 b 0.40 0.55 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 d 6.00 6.20 d1 5.10 e 6.40 6.60 e1 5.20 e0.85 e1 1.60 1.80 e2 3.30 3.50 e3 5.00 5.20 h 9.35 10.10 l1 (l1) 2.80 l2 0.80 l4 0.60 1.00 r0.20 v2 0 8
vn5e010ah package and packing information doc id 15984 rev 3 33/37 5.3 hpak suggested land pattern figure 40. hpak suggested pad layout (1) 1. the land pattern proposed is not intended to over rule user's pcb design, manufacturing and soldering process rules all dimensions are in mm.
package and packing information vn5e010ah 34/37 doc id 15984 rev 3 5.4 packing information the devices can be packed in tube or tape and reel shipments (see table 17: device summary ). figure 41. hpak tube shipment (no suffix) figure 42. hpak tape and reel (suffix ?tr?) all dimensions are in mm. base q.ty 75 bulk q.ty 3000 tube length ( 0.5) 532 a 6 b 21.3 c ( 0.1) 0.6 a c b all dimensions are in mm. base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 16.4 n (min) 60 t (max) 22.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 16 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 7.5 compartment depth k (max) 2.75 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions
vn5e010ah order codes doc id 15984 rev 3 35/37 6 order codes table 17. device summary package order codes tube tape and reel 6 pins hpak VN5E010AH-E vn5e010ahtr-e
revision history vn5e010ah 36/37 doc id 15984 rev 3 7 revision history table 18. document revision history date revision changes 2-jul-2009 1 initial release. 02-oct-2009 2 updated table 10: open load detection (8 v < vcc < 18 v) . 19-sep-2013 3 updated disclaimer.
vn5e010ah doc id 15984 rev 3 37/37 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particul ar purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ? automotive, automotive safe ty or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

▲Up To Search▲

Price & Availability of VN5E010AH-E

	To Download VN5E010AH-E Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .